The invention relates generally to integrated circuit fabrication and, in particular, to product chips and die with a feature pattern that contains information relating to the product chip, methods for fabricating product chips containing the information, and methods for reading the information from the packaged die.
Product chips, which are built using a semiconductor wafer, are usually much smaller than the wafer. In fact, as many as dozens of chips up to tens of thousands of product chips may be fabricated using a single wafer. The actual number of product chips yielded from a wafer is a function of the wafer size, as well as the individual chip size. Wafer manufacturers typically mark bare wafers, usually by laser impingement, with a code or identifier at a particular location around the wafer edge. The identification code, which is unique to each wafer, may be human-readable, machine-readable, or both. Hence, at the wafer manufacturer level, the smallest trackable physical unit is usually the wafer.
At the foundry, a series of processes used to fabricate integrated circuits or product chips containing device structures, such as field effect transistors, use the wafer as a foundation. Product chips are fabricated in parallel across the surface area of the wafer in repeating patterns using a set of masks to replicate the device structures. During certain steps of the chip fabrication process, measurements made on manufacturing equipment may be traceable at some level to the unique wafer identification code applied by the wafer manufacturer. At the conclusion of the fabrication process, the individual product chips are singulated (i.e., separated from each other) using a dicing operation that yields a corresponding plurality of die. Kerf or scribe-line channels are reserved as product dead space between the product chips for the purpose of singulation. A mechanical or laser apparatus cuts or scribes the wafer along the scribe-line channels to physically singulate the product chips into die.
Unfortunately, after physical separation from the wafer, the various singulated die are separated from the unique wafer identification code assigned by the wafer manufacturer. Hence, the parent wafer of origin is no longer identifiable for the product chips. In addition, the particular position of any arbitrary product chip in the array of product chips on a wafer is lost. This complete loss of identity may be accepted as a natural consequence of the singulation process.
Conventionally, however, special provisions may be made to retain all or part of the identity of each singulated die. In this regard, one conventional approach for retaining the die identity is to sequence the die by hand, which maintains the position-on-the-wafer information. However, manual tracking is error prone and, furthermore, is costly and time consuming with a low confidence of success in an actual manufacturing environment. Another conventional approach is to partition only a single wafer in a wafer lot and/or module lot, which may not be practical given floor control and other hardware tracking methodologies, equipment, and regulations.
Another approach is to laser scribe the backside of the chip with an identifier similar to the identifier applied by wafer manufacturers to mark bare wafers. However, laser scribing involves additional time and expense and is prohibited if the chip backside is to be altered by additional chemical or mechanical processing. Furthermore, when a die is encased in a plastic or other material package, then the laser-scribed identifier is no longer visible. A destructive de-packaging operation may be able to recover the information by making the identifier visible. However, de-packaging may prohibit continued use of the die.
Electrical Chip Identification (ECID) represents another conventional approach for retaining the identity of a product chip after singulation. In ECID, a bank of fuses is blown by application of a high voltage to generate an identifier. The configuration of the blown fuses may be electrically read to retrieve the identifier from the die. This approach is rather expensive in terms of the amount of chip real estate consumed for the fuses, which cannot be used to fabricate devices of the integrated circuit product. Moreover, the fuse blowing operation is time intensive and may result in yield losses. As chip dimensions shrink, the real estate available for both standard chip marking and, to a lesser extent, non-destructive ECID becomes smaller as well.
What is needed, therefore, are improved methods for associating information, such as a unique identifier, with die and product chips for tracking purposes after singulation from the wafer, as well as improved methods of nondestructively and non-invasively reading information, such as a unique identifier, from a product chip or die, and product chips and die carrying information, such as a unique identifier, that can be externally read in a non-destructive and non-invasive manner from the exterior of a product package.